> TSMC's A14 is brand-new process technology that is based on the company's 2nd Generation GAAFET nanosheet transistors and new standard cell architecture to enable performance, power, and scaling advantages. TSMC expects its A14 to deliver a 10% to 15% performance improvement at the same power and complexity, a 25% to 30% lower power consumption at the same frequency as well as transistor count, and 20% - 23% higher transistor density (for mixed chip design and logic, respectively), compared to N2. Since A14 is an all-new node, it will require new IPs, optimizations, and EDA software than N2P (which leverages N2 IP) as well as A16, which is N2P with backside power delivery.
Isn’t the point that other countries would have to think twice before letting China get their hands on Taiwan? The advantage to China would be immense if they secured Taiwan.
This is true but it has been fascinating seeing them trying to catch up. Necessity being mother of invention, all of that.
It is still hard to get much of a clear picture on how well they are doing on this stuff. Chinese companies are saying they are near parity, the opposition says they are 15 years behind, the reality is probably somewhere in between.
While they have made a lot of quick progress, that is no guarantee for future gains.
They have a cost advantage. Kinda fine for where I'm standing; if we want to have more investment, we must liberalize migration! If we don't liberalize migration, necessarily the capital-labor ratio will be more capital-scarce in other countries.
I blame the American corporate meme. American corporations are hideously slow, lumbering and quite honestly many are just "too big to fail" prop ups at this point. Long gone are actual qualified individuals running even semiconductor manufacturers and its just bean counters and country club nephews.
Software engineer salaries in the US are significantly higher than electrical and computer engineering salaries and have been for a whole. Most of the bright and ambitious EE and CE people went to faang companies in 2010s and probably earlier too.
American corporations are what created "Silicon Valley" in the first place. America is not slow, and it's definitely not "too big to fail" as the current administration is trying to make it fail, but that is an aside.
I think America doesn't manufacture semiconductors because it is a very unclean process, full of nasty chemicals. It's expensive to make semiconductors and deal with the clean-up. There are less environmental restrictions and cheaper labor in other parts of the world.
There are a bunch of Superfund sites around Mountain View, CA that serve as a reminder about the US Semiconductor industry - Fairchild Semiconductor, Intel, National Semiconductor, Monolithic Memories, and Raytheon to name a few.
Nobody in the U.S. really wants that in their back yard. Of course we've seen the same kind of thing from fracking, and everything else that rightly should be regulated or banned.
What happens now with a defunded and purposefully dysfunctional EPA is anyone's guess. Maybe manufacturers will exploit the political climate to further destroy the environment to make a few more million or billion dollars.
“Silicon Valley” is more than just some of the post-war defense research and high tech weapons contracts. It includes the financing/fundraising, the talent pool, nearby university research, and the advantages of “fail fast” startup culture (including California’s jurisprudence). It didn’t become recognizable in its current form until after NASA’s Moon Shot project threw tons of funding at research and manufacturing of computer miniaturization.
This. There are a few areas in the US that have a long history of being incubators of engineering firms beyond Silicon Valley, all because of WW2 which had tons of money being spent to produce certain types of equipment in each area.
And of course, this is before the mega defense contractors that exist now. The military absolutely fucking hates those megacorps and does still try and actively fund new small business entrants to military contracting. The problem is mega corps buy them up as the US is owned by them.
>"The popularization of the name is often credited to Don Hoefler, the first journalist to use the term in a news story.[1] His article "Silicon Valley U.S.A." was published in the January 11, 1971"
"Silicon Valley" describes the period between the late 1960s and mid/late 1990s (and still to this day to some extent). It has nothing to do with what went on there around World War II. Yes, semiconductor corporations created "Silicon Valley".
Before that time it may have been a sort of "Vacuum Tube Valley", but that does not have the same ring to it. And around WW2 there was tech going on everywhere, not just around Mountain View.
I skimmed it pretty quickly, but it doesn't change the fact that nobody called it "Silicon Valley" until 1971. The article you sent me was about WW2, and military, so far as I could tell. Reading it wouldn't change anything about my statements.
It literally tracks the histories of the individuals who founded all the corporations people think of as belonging to "Silicon Valley". Things tend to exist for a while before they get a widely recognizable name, friend.
Quite a bit of "Silicon Valley" was founded on outright theft from competitors. Now that the American industry is entrenched and "protect intellectual property" dominates over "improvement", falling behind other nations is inevitable.
One of the risks of any belief in American exceptionalism is that it hides the reality that there’s nothing special about America to have deserved its position in industry and commerce. There’s no special reason why it might not soon be someone else’s turn.
TSMC's competitive advantage comes from Taiwan's unique willingness to look away from wanton dumping of used acid wash like it's the 80s in Silicon Valley? Or moderately more expensive labor on one of those highly automated factories with FOUPs zooming every which way?
This is effective feature size and has little to do with actual geometry. Transistor size has barely budged in the last 10–15 years. The limitation is electrical, and it's not clear where that limit is. The smallest gate was built with an AFM out ~7 atoms; that's about 8 orders of magnitude smaller than a transistor, rn, and upwards of 9 than a stdcell. There's a LOT of room; we just don't know a good path to get to there.
"The smallest gate was built with an AFM out ~7 atoms; that's about 8 orders of magnitude smaller than a transistor"
I was thrown off by your statement, so here are some numbers: a modern chip like Nvidia's GH100 manufactured at a 5 nm process is 80 billion gates in 814 mm². That means a gate is 100 nm wide which is the width of 500 silicon atoms. On a 2D area that's 250k atoms. I don't know the thickness but assuming it's also 500 atoms then a gate has a volume of 125 million atoms.
So I guess you get your "8 orders of magnitude" difference if you compare the three-dimensional volume (7 atoms vs 125 million). But on one dimension it's only 2 orders of magnitude (7 atoms vs 500). And the semiconductor industry measures progress on one dimension so to me the "2 orders of magnitude" seems the more relevant comparison to make.
You're missing the key point, which is that the size referenced as the semiconductor manufacturing node is no longer an accurate description of the true transistor size, it's more of a marketing term.
Even if it's possible to build transistors that are 1.4nm in size (or smaller), that is not what "1.4nm" means in the context of this announcement. I get that this can be confusing, it's just a case of smoke and mirrors because Moore's Law is already dead and semiconductor manufacturers don't want to spook investors. The performance gains are still real, but the reasons for getting them are no longer as simple as shrinking transistor size.
As for the true physical limits of transistor sizes, there are problems like quantum tunnelling that we aren't likely to overcome, so even if you can build a gate with 7 atoms, that doesn't mean it'll work effectively. Also note that "gate" does not necessarily mean "transistor".
Personally I wouldn't argue Moore's law is dead but I do wonder about the cost per chip. WE can still push smaller for a lot longer but the costs are starting to creep up a bit.
I am not too worried though because adjusted for inflation, we are still saying a lot less for this tech than we were in pre-2000's tech.
Economy of scale used to drop prices, complexity of manufacturing will slowly increase them again.
Similar concerns were expressed around the development of VLSI tooling in the '70s. We've been on this curve for a long time. I can speak with some experience that manufacturing of steel and wood products increases similarly in cost and complexity with scale. Beasts like these exist: https://en.wikipedia.org/wiki/Heavy_Press_Program
As long as the scale of production is increasing, additional investments will be warranted.
So, it's more of an engineering problem than a physical one? I read somewhere a while ago about strange quantum effects activating at these scales too. What's the current state beyond 1.4 nm with our current knowledge?
At the TSMC second-quarter earnings conference and conference call on Thursday, TSMC chairman C.C. Wei (魏哲家) said that after the completion of the company’s US$165 billion investment in the US, “about 30 percent of our 2-nanometer and more advanced capacity will be located in Arizona, creating an independent leading-edge semiconductor manufacturing cluster in the US.”
The Arizona investment includes six advanced wafer manufacturing fabs, two advanced packaging fabs and a major research and development center.
I mean, it could be - the highly filtered water could be re-filtered.
But unless it's cheaper to do so, or they're required by law to do so, they're just going to pump cleaner starting water out of the drinking supply and use that.
And good luck finding a city or state government that's not so desperate for big industry and tech jobs to arrive that they will hold their feet to the fire and demand they cut water use.
As TSMC and Taiwang government policy, they always build it first in Taiwan, run for some years and then build in the US. They keep Taiwan relevant and protected this way.
Yeah, who wouldn't invest locally first when there is an economic advantage to doing so? Their suppliers, talent base, and management are all there already.
Thanks to all the investment due to AI we have been able to continue these improvement at the current rate. To put things into perspective an Apple 1.4nm A18 Pro ( 3nm ) would only use ~50% of the energy with the same performance.
I am hoping we have more to squeeze out from an IPC or PPA ( Performance per area ) metric. ARM seems to be in the lead in this area. Wondering if Apple will have something to show in A19 / M5.
NAND and DRAM side is a bit more worrying though. Nothing in the pipeline suggest some dramatic changes.
Edit: Not sure why I am getting downvoted every time I say it is AI investment leading to improvements. I guess some on HN really hate AI.
TSMC announced new fabs in the US earlier this year. They need new fabs in Taiwan so nobody gets any ideas that TSMC could continue operations without a free Taiwan. Keeping Taiwan indispensable to the US is how they keep Chinese invasion plans in the planning state
Why would a free taiwan be necessary? I don’t think there ccp would have any qualms about tsmc continuing operation. A chinese company being the indisputed best at the modt advanced industry in the world is a good thing for them. Assuming a bloodless takeover occurred it would be business as usual.
It seems very unlikely to me that between KMT loyalist troops and angry mobs that China would simply be allowed to take Taiwan without violence, and that nobody would decide to use TSMC as a hostage.
See the Swiss strategy, where every bridge and tunnel has its explosives pre-placed when it was built.
The whole system that supports TSMC will break down in the event of a war.
You can see this with SMIC and their inability to get modern lithography systems from the only leading edge vendor ASML. Sure, you can create your own vendors to replace such companies, but they are unlikely to ever catch up to the leading edge or even be only a generation or two behind the leading edge despite massive investments.
With non-leading edge equipment & processes you have to make compromises like making much larger chips so you can get the same compute in a low power profile. This drives up the initial cost of every device you make and you run into throughput issues like what Huawei has experienced where they cannot produce enough ships to ship their flagship ship phones at a reasonable price and simultaneously keep them in stock.
Instead you get boutique products that sell out practically immediately because there were so few units that were able to be manufactured.
Fabs can and do recover from major contamination events. In 2021, Renesas suffered a fire that destroyed about 5% of their N3 building. It took them just under a month to resume production and just over 3 months to reach pre-incident production levels. Fab decontamination is a major task, but ultimately it's just a very, very thorough cleaning process.
Incidentally, they don't operate at BSL3 - that's a standard for biosafety that has more to do with protecting the outside world from the lab rather than vice-versa. Fabs operate in accordance with ISO 14644.
The implication I got from the GP comment is that the U.S. would be reluctant to have CCP manufacturing the processors due to the (proven) risk that they’ll modify and backdoor stuff.
If TSMC over invests in US factories then they could be taken over under imminent domain if Taiwan was no longer independent. So they have to keep a large portion of manufacturing domestic to Taiwan for lessened geopolitical risk.
You underestimate how gobsmackingly dumb this administration is, IMO. They've cancelled extremely important, multi-year or -decade long clinical trials just for funsies.
What advantage will a 1.4nm chip have over a 4nm one? What new capabilities will this tech unlock on an edge device like my iPhone ?
Please don't mention lower power consumption.
Silicon is way outside my wheelhouse, so genuine question: why not mention power consumption? In the data center, is this not one of the most important metrics?
For instance, GK104 on 28nm was 3.5 billion transistors. AD104 today is 35 billion. Is Nvidia really paying 10x as much for an AD104 die as a GK104 die?
If your "cost per transistor" calculation includes amortization of the fixed costs of taping out a chip, over the expected production volume, then you can sometimes genuinely end up with newer process nodes being more expensive. Design for more advanced nodes keeps getting more expensive, and mask sets keep getting more expensive. Even more so if you're pricing out a mature process node compared to early in the production ramp up of a leading edge node.
There's significant demand for older process nodes and we constantly see new chips designed for older nodes, and those companies are usually saving money by doing so (it's rare for a new chip to require such high production volumes that it couldn't be made with the production capacity of leading-edge fabs).
Intel and AMD have both been selling for years chiplet-based processors that mix old and newer fab processes, using older cheaper nodes to make the parts of the processor that see little benefit from the latest and greatest nodes (eg. IO controllers) while using the newer nodes only for the performance-critical CPU cores. (Numerous small chiplets vs one large chip also helps with yields, but we don't see as many designs doing lots of chiplets on the same node.)
What google turns up when I google this is this statement by google [1], which attributes the low point to 28nm (as of 2023)... and I tend to agree with the person you are responding to that that doesn't pass the sniff test...
My laptop definitely dies significantly faster when I'm making it work instead of just mindlessly scrolling on it... since the display is on in both cases I don't see what that could be but chip powre consumption making a singificant difference.
My phone dies much faster when I am using it, but admittedly screen usage means I can't prove that's chip power consumption.
VR headsets get noticeably hot in use, and I'm all but certain that that is largely chip power usage.
Macbook airs are the same speed as macbook pros until they thermally throttle, because the chips use too much power.
I've not checked it, but AFAIK power consumption isn't really improved much if at all with dye shrinks. The main benefits are entirely around transistor density increases which allows for things like bigger caches.
It'll be beneficial to DRAM chips, allowing for higher density memory. And it'll be beneficial to GPGPUs, allowing for more GPU processors in a package.
> The main benefits are entirely around transistor density increases which allows for things like bigger caches
SRAM is probably the the worst example as it scales poorly with process shrinks. There are tricks still left in the bag to deal with this, like GAA, but caches and SRAM cells are not the headline here. It's power and general transistor density.
If the marketing naming is to be believed, in 1.4nm vs 4nm you'd be able to fit ~twice the transistors in your chip. That's twice the cores, twice the cache... That usually makes it faster.
A 1.4nm chip offers significant performance and capability improvements over a 4nm chip, primarily due to increased transistor density. This allows for more powerful and efficient on-device AI processing, enabling new features and capabilities on devices like an iPhone without relying on cloud-based services
I find it amusing how we’ve come from treating AI as a novelty to developing a sense of how it writes in the space of a few months. That parent comment doesn’t even have the famed em dashes, for instance. Still, we are able to recognize it as AI-generated just by looking at its syntax.
For me it is the lack of content, the blandness of the statement. You can tell it is just saying vague statements that could be true if you substituted 14nm and 8nm for 4nm and 1.4nm.
More information on the new node:
> TSMC's A14 is brand-new process technology that is based on the company's 2nd Generation GAAFET nanosheet transistors and new standard cell architecture to enable performance, power, and scaling advantages. TSMC expects its A14 to deliver a 10% to 15% performance improvement at the same power and complexity, a 25% to 30% lower power consumption at the same frequency as well as transistor count, and 20% - 23% higher transistor density (for mixed chip design and logic, respectively), compared to N2. Since A14 is an all-new node, it will require new IPs, optimizations, and EDA software than N2P (which leverages N2 IP) as well as A16, which is N2P with backside power delivery.
https://www.tomshardware.com/tech-industry/tsmc-unveils-1-4n...
What about SRAM?
At this point, the transistors will scale smaller and the eventually the whole chip will just be sram by area.
Kind of sad what's happened to US semiconductor manufacturing. Speaking from an American perspective, of course.
The US is trying to get fabrication out of Taiwan so that it doesn’t need to defend Taiwan from China.
If you were Taiwanese this would worry you?
It makes complete sense for Taiwan to invest in maintaining it’s “silicon shield” even as china tries to catch up with fabrication on the mainland.
We’re assuming that the “silicon shield” is even a thing anymore.
China can comfortably make chips that might be the equivalent of 5 year old Taiwanese ones. Last time I checked, that’s extremely viable.
No military general ever is going to say, “we can’t invade, we’re half a decade behind!”
Isn’t the point that other countries would have to think twice before letting China get their hands on Taiwan? The advantage to China would be immense if they secured Taiwan.
I wouldn't say comfortably - they're brute forcing it by using UV sources suitable for much older nodes.
End result requires more energy, has lower yield and is overall more expensive.
For military purposes and whatnot that's enough, but they can't put this in consumer devices without subsidies.
This is true but it has been fascinating seeing them trying to catch up. Necessity being mother of invention, all of that.
It is still hard to get much of a clear picture on how well they are doing on this stuff. Chinese companies are saying they are near parity, the opposition says they are 15 years behind, the reality is probably somewhere in between.
While they have made a lot of quick progress, that is no guarantee for future gains.
They have a cost advantage. Kinda fine for where I'm standing; if we want to have more investment, we must liberalize migration! If we don't liberalize migration, necessarily the capital-labor ratio will be more capital-scarce in other countries.
I blame the American corporate meme. American corporations are hideously slow, lumbering and quite honestly many are just "too big to fail" prop ups at this point. Long gone are actual qualified individuals running even semiconductor manufacturers and its just bean counters and country club nephews.
anddd, just like any other Western Europesn country Americans need to be paid (semi-) living wages
Are you arguing that engineers inadequate salaries are to blame for intel losing its edge?
Software engineer salaries in the US are significantly higher than electrical and computer engineering salaries and have been for a whole. Most of the bright and ambitious EE and CE people went to faang companies in 2010s and probably earlier too.
American corporations are what created "Silicon Valley" in the first place. America is not slow, and it's definitely not "too big to fail" as the current administration is trying to make it fail, but that is an aside.
I think America doesn't manufacture semiconductors because it is a very unclean process, full of nasty chemicals. It's expensive to make semiconductors and deal with the clean-up. There are less environmental restrictions and cheaper labor in other parts of the world.
There are a bunch of Superfund sites around Mountain View, CA that serve as a reminder about the US Semiconductor industry - Fairchild Semiconductor, Intel, National Semiconductor, Monolithic Memories, and Raytheon to name a few.
Nobody in the U.S. really wants that in their back yard. Of course we've seen the same kind of thing from fracking, and everything else that rightly should be regulated or banned.
What happens now with a defunded and purposefully dysfunctional EPA is anyone's guess. Maybe manufacturers will exploit the political climate to further destroy the environment to make a few more million or billion dollars.
> American corporations are what created "Silicon Valley" in the first place.
According to https://steveblank.com/2009/04/27/the-secret-history-of-sili... and https://www.youtube.com/watch?v=ZTC_RxWN_xo the creation of Silicon Valley had more to do with academic expertise in radio research and Department of Defense funding circa World War II. Corporations were the "second wave".
“Silicon Valley” is more than just some of the post-war defense research and high tech weapons contracts. It includes the financing/fundraising, the talent pool, nearby university research, and the advantages of “fail fast” startup culture (including California’s jurisprudence). It didn’t become recognizable in its current form until after NASA’s Moon Shot project threw tons of funding at research and manufacturing of computer miniaturization.
This. There are a few areas in the US that have a long history of being incubators of engineering firms beyond Silicon Valley, all because of WW2 which had tons of money being spent to produce certain types of equipment in each area.
And of course, this is before the mega defense contractors that exist now. The military absolutely fucking hates those megacorps and does still try and actively fund new small business entrants to military contracting. The problem is mega corps buy them up as the US is owned by them.
>"The popularization of the name is often credited to Don Hoefler, the first journalist to use the term in a news story.[1] His article "Silicon Valley U.S.A." was published in the January 11, 1971"
https://en.wikipedia.org/wiki/Silicon_Valley
"Silicon Valley" describes the period between the late 1960s and mid/late 1990s (and still to this day to some extent). It has nothing to do with what went on there around World War II. Yes, semiconductor corporations created "Silicon Valley".
Before that time it may have been a sort of "Vacuum Tube Valley", but that does not have the same ring to it. And around WW2 there was tech going on everywhere, not just around Mountain View.
Tell me you didn't read or watch the linked references without saying so.
I skimmed it pretty quickly, but it doesn't change the fact that nobody called it "Silicon Valley" until 1971. The article you sent me was about WW2, and military, so far as I could tell. Reading it wouldn't change anything about my statements.
It literally tracks the histories of the individuals who founded all the corporations people think of as belonging to "Silicon Valley". Things tend to exist for a while before they get a widely recognizable name, friend.
Quite a bit of "Silicon Valley" was founded on outright theft from competitors. Now that the American industry is entrenched and "protect intellectual property" dominates over "improvement", falling behind other nations is inevitable.
One of the risks of any belief in American exceptionalism is that it hides the reality that there’s nothing special about America to have deserved its position in industry and commerce. There’s no special reason why it might not soon be someone else’s turn.
TSMC's competitive advantage comes from Taiwan's unique willingness to look away from wanton dumping of used acid wash like it's the 80s in Silicon Valley? Or moderately more expensive labor on one of those highly automated factories with FOUPs zooming every which way?
Press (X) to doubt.
How close are we to the limits here? What is the smallest technology we can get to before physics gets in the way?
This is effective feature size and has little to do with actual geometry. Transistor size has barely budged in the last 10–15 years. The limitation is electrical, and it's not clear where that limit is. The smallest gate was built with an AFM out ~7 atoms; that's about 8 orders of magnitude smaller than a transistor, rn, and upwards of 9 than a stdcell. There's a LOT of room; we just don't know a good path to get to there.
"The smallest gate was built with an AFM out ~7 atoms; that's about 8 orders of magnitude smaller than a transistor"
I was thrown off by your statement, so here are some numbers: a modern chip like Nvidia's GH100 manufactured at a 5 nm process is 80 billion gates in 814 mm². That means a gate is 100 nm wide which is the width of 500 silicon atoms. On a 2D area that's 250k atoms. I don't know the thickness but assuming it's also 500 atoms then a gate has a volume of 125 million atoms.
So I guess you get your "8 orders of magnitude" difference if you compare the three-dimensional volume (7 atoms vs 125 million). But on one dimension it's only 2 orders of magnitude (7 atoms vs 500). And the semiconductor industry measures progress on one dimension so to me the "2 orders of magnitude" seems the more relevant comparison to make.
You're missing the key point, which is that the size referenced as the semiconductor manufacturing node is no longer an accurate description of the true transistor size, it's more of a marketing term.
Even if it's possible to build transistors that are 1.4nm in size (or smaller), that is not what "1.4nm" means in the context of this announcement. I get that this can be confusing, it's just a case of smoke and mirrors because Moore's Law is already dead and semiconductor manufacturers don't want to spook investors. The performance gains are still real, but the reasons for getting them are no longer as simple as shrinking transistor size.
As for the true physical limits of transistor sizes, there are problems like quantum tunnelling that we aren't likely to overcome, so even if you can build a gate with 7 atoms, that doesn't mean it'll work effectively. Also note that "gate" does not necessarily mean "transistor".
I know and acknowledged it: GH100 gates are 100nm wide despite the "5nm" process. We all know about this discrepancy.
"Moore's Law is already dead"
That's clearly false, have a quick look at this chart: https://semiconductor.substack.com/p/the-relentless-pursuit-...
> Moore's law is dead
People have said this for decades. Jim Keller believes otherwise and brought receipts: https://www.youtube.com/watch?v=oIG9ztQw2Gc
Personally I wouldn't argue Moore's law is dead but I do wonder about the cost per chip. WE can still push smaller for a lot longer but the costs are starting to creep up a bit.
I am not too worried though because adjusted for inflation, we are still saying a lot less for this tech than we were in pre-2000's tech.
Economy of scale used to drop prices, complexity of manufacturing will slowly increase them again.
Similar concerns were expressed around the development of VLSI tooling in the '70s. We've been on this curve for a long time. I can speak with some experience that manufacturing of steel and wood products increases similarly in cost and complexity with scale. Beasts like these exist: https://en.wikipedia.org/wiki/Heavy_Press_Program
As long as the scale of production is increasing, additional investments will be warranted.
So, it's more of an engineering problem than a physical one? I read somewhere a while ago about strange quantum effects activating at these scales too. What's the current state beyond 1.4 nm with our current knowledge?
(in Taiwan)
> (in Taiwan)
But also:
At the TSMC second-quarter earnings conference and conference call on Thursday, TSMC chairman C.C. Wei (魏哲家) said that after the completion of the company’s US$165 billion investment in the US, “about 30 percent of our 2-nanometer and more advanced capacity will be located in Arizona, creating an independent leading-edge semiconductor manufacturing cluster in the US.”
The Arizona investment includes six advanced wafer manufacturing fabs, two advanced packaging fabs and a major research and development center.
Hey, how much water would that infrastructure need, possibly?
Isn't this water nearly 100% recyclable? It's not that it would get used up, like water used for watering of almond trees in California.
I mean, it could be - the highly filtered water could be re-filtered.
But unless it's cheaper to do so, or they're required by law to do so, they're just going to pump cleaner starting water out of the drinking supply and use that.
And good luck finding a city or state government that's not so desperate for big industry and tech jobs to arrive that they will hold their feet to the fire and demand they cut water use.
There was a story about this a year ago: https://fortune.com/2024/04/08/tsmc-water-usage-phoenix-chip...
As TSMC and Taiwang government policy, they always build it first in Taiwan, run for some years and then build in the US. They keep Taiwan relevant and protected this way.
Geopolitics aside, is this not just good business sense given the accepted labor practices and talent pool in Taiwan vs. other countries?
Yeah, who wouldn't invest locally first when there is an economic advantage to doing so? Their suppliers, talent base, and management are all there already.
The hint is in the company’s name. ;)
TSMC building outside of Taiwan is a big deal these days: https://en.wikipedia.org/wiki/TSMC#Arizona https://en.wikipedia.org/wiki/TSMC#Washington https://en.wikipedia.org/wiki/TSMC#Japan https://en.wikipedia.org/wiki/TSMC#Germany
From the article:
.. so it's interesting that they are moving forward with domestic 1.4nm given the geopolitical climate.> The hint is in the company’s name. ;)
They might build factories outside Taiwan you never know.
Of course. And were that the actual case, it would be worth having in the summary.
The chips we need for the machines that will defend Taiwan are being built in Taiwan is just a ridiculous game of chicken to be setup.
I wish they’d take the next step with the defense treaty to move even more capacity (esp for the highest grade stuff) to stateside.
Most of the defense tech is not using bleeding edge N2-N7 nodes.
Thanks to all the investment due to AI we have been able to continue these improvement at the current rate. To put things into perspective an Apple 1.4nm A18 Pro ( 3nm ) would only use ~50% of the energy with the same performance.
I am hoping we have more to squeeze out from an IPC or PPA ( Performance per area ) metric. ARM seems to be in the lead in this area. Wondering if Apple will have something to show in A19 / M5.
NAND and DRAM side is a bit more worrying though. Nothing in the pipeline suggest some dramatic changes.
Edit: Not sure why I am getting downvoted every time I say it is AI investment leading to improvements. I guess some on HN really hate AI.
I wonder if they see reduced geopolitical risk or if they simply must continue to operate as if nothing is going to happen until something happens.
TSMC announced new fabs in the US earlier this year. They need new fabs in Taiwan so nobody gets any ideas that TSMC could continue operations without a free Taiwan. Keeping Taiwan indispensable to the US is how they keep Chinese invasion plans in the planning state
Why would a free taiwan be necessary? I don’t think there ccp would have any qualms about tsmc continuing operation. A chinese company being the indisputed best at the modt advanced industry in the world is a good thing for them. Assuming a bloodless takeover occurred it would be business as usual.
"Bloodless takeover" is assuming a lot. Pro unification is a very fringe position: https://en.m.wikipedia.org/wiki/Chinese_Unification_Promotio...
It seems very unlikely to me that between KMT loyalist troops and angry mobs that China would simply be allowed to take Taiwan without violence, and that nobody would decide to use TSMC as a hostage.
See the Swiss strategy, where every bridge and tunnel has its explosives pre-placed when it was built.
The whole system that supports TSMC will break down in the event of a war.
You can see this with SMIC and their inability to get modern lithography systems from the only leading edge vendor ASML. Sure, you can create your own vendors to replace such companies, but they are unlikely to ever catch up to the leading edge or even be only a generation or two behind the leading edge despite massive investments.
With non-leading edge equipment & processes you have to make compromises like making much larger chips so you can get the same compute in a low power profile. This drives up the initial cost of every device you make and you run into throughput issues like what Huawei has experienced where they cannot produce enough ships to ship their flagship ship phones at a reasonable price and simultaneously keep them in stock.
Instead you get boutique products that sell out practically immediately because there were so few units that were able to be manufactured.
All they need to do, is open a fire exit, and run a leafblower.
Fabs run at BSL3. Get that dirty, and you have a whole lot of expensive scrap metal.
Fabs can and do recover from major contamination events. In 2021, Renesas suffered a fire that destroyed about 5% of their N3 building. It took them just under a month to resume production and just over 3 months to reach pre-incident production levels. Fab decontamination is a major task, but ultimately it's just a very, very thorough cleaning process.
Incidentally, they don't operate at BSL3 - that's a standard for biosafety that has more to do with protecting the outside world from the lab rather than vice-versa. Fabs operate in accordance with ISO 14644.
Thanks for the extra info.
I used to work for a company that made steppers.
Pretty hairy stuff.
And you are correct. I have found “BSL3” conjures up the most appropriate images, though.
The implication I got from the GP comment is that the U.S. would be reluctant to have CCP manufacturing the processors due to the (proven) risk that they’ll modify and backdoor stuff.
If TSMC over invests in US factories then they could be taken over under imminent domain if Taiwan was no longer independent. So they have to keep a large portion of manufacturing domestic to Taiwan for lessened geopolitical risk.
In that case almost any country would let their borders wide open for refugee visas to get the semiconductor talent over. even the us under trump.
You underestimate how gobsmackingly dumb this administration is, IMO. They've cancelled extremely important, multi-year or -decade long clinical trials just for funsies.
Do you mean ‘bloodless’ like the way the CCP controls dissidents now?
There are rumors their fabs are rigged to self destruct rather than fall to china
https://www.theregister.com/AMP/2024/05/21/asml_kill_switch/
The best thing to do is become as valuable to the USA as possible
By the time the factories are completed, Trump will likely have changed his mind about the tariffs a dozen times. Just move along..
What advantage will a 1.4nm chip have over a 4nm one? What new capabilities will this tech unlock on an edge device like my iPhone ? Please don't mention lower power consumption.
> Please don't mention lower power consumption.
Silicon is way outside my wheelhouse, so genuine question: why not mention power consumption? In the data center, is this not one of the most important metrics?
It is even more important in portable battery powered devices.
> Please don't mention lower power consumption.
How about "longer battery life".
Also "lower cost".
Or sacrificing those on the alter of more compute running more complex things.
Cost per transistor stopped going down awhile ago
Can this be right?
For instance, GK104 on 28nm was 3.5 billion transistors. AD104 today is 35 billion. Is Nvidia really paying 10x as much for an AD104 die as a GK104 die?
If your "cost per transistor" calculation includes amortization of the fixed costs of taping out a chip, over the expected production volume, then you can sometimes genuinely end up with newer process nodes being more expensive. Design for more advanced nodes keeps getting more expensive, and mask sets keep getting more expensive. Even more so if you're pricing out a mature process node compared to early in the production ramp up of a leading edge node.
There's significant demand for older process nodes and we constantly see new chips designed for older nodes, and those companies are usually saving money by doing so (it's rare for a new chip to require such high production volumes that it couldn't be made with the production capacity of leading-edge fabs).
Intel and AMD have both been selling for years chiplet-based processors that mix old and newer fab processes, using older cheaper nodes to make the parts of the processor that see little benefit from the latest and greatest nodes (eg. IO controllers) while using the newer nodes only for the performance-critical CPU cores. (Numerous small chiplets vs one large chip also helps with yields, but we don't see as many designs doing lots of chiplets on the same node.)
28nm was over a decade ago. Cost scaling stopped around 2021
Do you have a citation for this?
What google turns up when I google this is this statement by google [1], which attributes the low point to 28nm (as of 2023)... and I tend to agree with the person you are responding to that that doesn't pass the sniff test...
[1] https://www.semiconductor-digest.com/moores-law-indeed-stopp...
Lower power consumption makes almost no difference at the consumer tier.
My laptop definitely dies significantly faster when I'm making it work instead of just mindlessly scrolling on it... since the display is on in both cases I don't see what that could be but chip powre consumption making a singificant difference.
My phone dies much faster when I am using it, but admittedly screen usage means I can't prove that's chip power consumption.
VR headsets get noticeably hot in use, and I'm all but certain that that is largely chip power usage.
Macbook airs are the same speed as macbook pros until they thermally throttle, because the chips use too much power.
This claim just doesn't pass the smell test.
It might be niche, but I just got a new computer for this very reason.
Why wouldn’t you want lower power usage?
I've not checked it, but AFAIK power consumption isn't really improved much if at all with dye shrinks. The main benefits are entirely around transistor density increases which allows for things like bigger caches.
It'll be beneficial to DRAM chips, allowing for higher density memory. And it'll be beneficial to GPGPUs, allowing for more GPU processors in a package.
> The main benefits are entirely around transistor density increases which allows for things like bigger caches
SRAM is probably the the worst example as it scales poorly with process shrinks. There are tricks still left in the bag to deal with this, like GAA, but caches and SRAM cells are not the headline here. It's power and general transistor density.
Lower heat production.
Lower power consumption is always relevant for portable devices. 1.4nm will have many more transistors per mm^2 which should improve performance.
If the marketing naming is to be believed, in 1.4nm vs 4nm you'd be able to fit ~twice the transistors in your chip. That's twice the cores, twice the cache... That usually makes it faster.
If the marketing name is to believed... and we assume both dimensions scale the same... (4/1.4)^2 = 8.16x the transistors.
Facebook 2
More chips per wafer.
For iPhone, not much. It already has a ridiculously powerful CPU. SWEs can continue writing ridiculously inefficient code.
For data centers, it will help a lot. More compute for same power.
A 1.4nm chip offers significant performance and capability improvements over a 4nm chip, primarily due to increased transistor density. This allows for more powerful and efficient on-device AI processing, enabling new features and capabilities on devices like an iPhone without relying on cloud-based services
But at the same time, the cost of manufacturing may increase. But I have no data on this, it's just a guess.
It will increase, but amortization tends to make that fall off over time. Also the newer processes tend to result in smaller die sizes.
Production of anything on a new line is expensive, doesn't matter if it is chips or cheeze-its
But you also get more transistors per wafer
Depends on your yield, actually :( You get more transistors per square mm.
Is this chatGPT? Just want to check on a hunch.
I find it amusing how we’ve come from treating AI as a novelty to developing a sense of how it writes in the space of a few months. That parent comment doesn’t even have the famed em dashes, for instance. Still, we are able to recognize it as AI-generated just by looking at its syntax.
For me it is the lack of content, the blandness of the statement. You can tell it is just saying vague statements that could be true if you substituted 14nm and 8nm for 4nm and 1.4nm.